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  ? semiconductor components industries, llc, 2014 january, 2014 ? rev. 2 1 publication order number: ncs2003/d ncs2003, ncv2003 low voltage, rail-to-rail output operational amplifier the ncs2003/ncv2003 is a low voltage operational amplifier with rail ? to ? rail output drive capability. the 1.8 v operation allows high performance operation in low voltage, low power applications. additional features include no output phase reversal with overdriven inputs, a low input offset voltage of 0.5 mv, ultra low input bias current of 1 pa, and a unity gain bandwidth of 5 mhz at 1.8 v. the tiny ncs2003 is the ideal solution for small portable electronic applications and is available in the space saving sot23 ? 5 and sot ? 553 packages. the ncv2003 is available in sot23 ? 5 and is aec ? q100 qualified and ppap capable. features ? 7 mhz unity gain bandwidth at 5 v ? 5 mhz unity gain bandwidth at 1.8 v ? rail ? to ? rail output ? no output phase reversal for over ? driven input signals ? low offset voltage ? 500  v typical ? low input bias current ? 1 pa typical ? space saving sot23 ? 5 and sot553 ? 5 packages ? ncv prefix for automotive and other applications requiring unique site and control change requirements; aec ? q100 qualified and ppap capable ? these devices are pb ? free, halogen free/bfr free and are rohs compliant typical applications ? cellular telephones ? current shunt monitors for battery monitoring ? pulse oximetry signal conditioning ? blood pressure monitor conditioning and filtering ? hard drive sensor buffer this document contains information on some products that are still under development. on semiconductor reserves the right to change or discontinue these products without notice. http://onsemi.com ordering information sot23 ? 5 case 483 ? 02 (ncs/ncv2003) pin connections 1 v out v ss in+ 2 3 5 4 v dd in ? sot23 ? 5 + ? 1 in+ v ss in ? 2 3 5 4 v dd out sot553 ? 5 + ? marking diagrams an3 = ncs/ncv2003sn2t1g a3 = NCS2003XV53T2G y = year w = work week m = date code  =pb ? free package sot553, 5 lead case 463b (ncs2003) (note: microdot may be in either location) 1 5 an3yw   1 5 a3m see detailed ordering and shipping information on page 8 of this data sheet.
ncs2003, ncv2003 http://onsemi.com 2 absolute maximum ratings over operating free ? air temperature, unless otherwise stated parameter symbol limit unit supply voltage (v dd ? v ss ) v s 7 v input and output pins input voltage (note 1) v in v ss ? 300 mv to 7.0 v v input current i in 10 ma output short circuit current (note 2) i osc 100 ma temperature storage temperature t stg ? 65 to 150 c junction temperature t j 150 c esd ratings human body model hbm 2000 v machine model mm 200 v stresses exceeding maximum ratings may damage the device. maximum ratings are stress ratings only. functional operation above t he recommended operating conditions is not implied. extended exposure to stresses above the recommended operating conditions may af fect device reliability. 1. neither input should exceed the range of vss ? 300 mv to 7.0 v 2. indefinite duration; however, maximum package power dissipation limits must be observed to ensure that the maximum junction temperature is not exceeded. thermal information (note 3) thermal metric symbol limit unit junction to ambient ? sot23 ? 5  ja 235 c/w junction to ambient ? sot553 ? 5  ja 250 c/w 3. as mounted on an 80 x 80 x 1.5 mm fr4 pcb with 650 mm 2 and 2 oz (0.034 mm) thick copper heat spreader. following jedec jesd/eia 51.1, 51.2, 51.3 test guidelines. operating conditions parameter symbol limit unit operating supply voltage v s 1.7 to 5.5 v specified operating range ncs2003 ncv2003 t a ? 40 to +85 ? 40 to +125 c
ncs2003, ncv2003 http://onsemi.com 3 electrical characteristics: v s = +1.8 v at t a = +25 c, r l = 10 k  connected to midsupply, v cm = v out = midsupply, unless otherwise noted. boldface limits apply over the specified temperature range, t a = ?40 c to +85 c (ncs2003), t a = ?40 c to +125 c (ncv2003). guaranteed by design and/or characterization. parameter symbol conditions min typ max unit input characteristics offset voltage v os 0.5 4.0 mv 5.0 offset voltage drift  v/  t 2.0  v/ c input bias current i ib 1 pa input offset current i os 1 pa differential input resistance r in >1 t  differential input capacitance c in 1.2 pf input common mode range v icr inferred from cmrr v ss v dd ? 0.6 v common mode rejection ratio cmrr v in = 0 v to v dd ? 0.6 v 70 80 db v in = 0.2 v to v dd ? 0.6 v 65 output characteristics output voltage high v oh v id = +0.5 v, r l = 10 k  1.75 1.798 v 1.75 v id = +0.5 v, r l = 2 k  1.7 1.78 1.7 output voltage low v ol v id = ? 0.5 v, r l = 10 k  7.0 50 mv 50 v id = ? 0.5 v, r l = 2 k  20 100 100 short circuit current i sc v id = +0.5 v, v o = v ss , sourcing 5.0 8.0 ma v id = ? 0.5 v, v o = v dd , sinking 10 14 noise performance voltage noise density e n f = 1 khz 20 nv/ hz current noise density i n f = 1 khz 0.1 pa/ hz dynamic performance open loop voltage gain a vol r l = 10 k  80 92 db 75 r l = 2 k  92 db 70 gain bandwidth product gbwp 5 mhz gain margin a m r l = 10 k  , c l = 5 pf 12 db phase margin  m r l = 10 k  , c l = 5 pf 53 slew rate sr positive slope, r l = 2 k, a v = +1 6 v/  s negative slope, r l = 2 k, a v = +1 9 v/  s total harmonic distortion + noise thd+n v o = 1 vpp, r l = 2 k  , a v = +1, 1 khz 0.015 % v o = 1 vpp, r l = 2 k  , a v = +1, 10 khz 0.025 % power supply power supply rejection ratio psrr 72 80 db 65 quiescent current i cc no load 230 560  a 1 ma
ncs2003, ncv2003 http://onsemi.com 4 electrical characteristics: v s = +5.0 v at t a = +25 c, r l = 10 k  connected to midsupply, v cm = v out = midsupply, unless otherwise noted. boldface limits apply over the specified temperature range, t a = ?40 c to +85 c (ncs2003), t a = ?40 c to +125 c (ncv2003). guaranteed by design and/or characterization. parameter symbol conditions min typ max unit input characteristics offset voltage v os 0.5 4.0 mv 5.0 offset voltage drift  v/  t 2.0  v/ c input bias current i ib 1 pa input offset current i os 1 pa differential input resistance r in >1 t  differential input capacitance c in 1.2 pf input common mode range v icr inferred from cmrr v ss v dd ? 0.6 v common mode rejection ratio cmrr v in = 0 v to v dd ? 0.6 v 65 70 db v in = 0.2 v to v dd ? 0.6 v 63 output characteristics output voltage high v oh v id = +0.5 v, r l = 10 k  4.95 4.99 v 4.95 v id = +0.5 v, r l = 2 k  4.9 4.97 4.9 output voltage low v ol v id = ? 0.5 v, r l = 10 k  8.0 50 mv 50 v id = ? 0.5 v, r l = 2 k  24 100 100 short circuit current i sc v id = +0.5 v, v o = v ss , sourcing 40 76 ma v id = ? 0.5 v, v o = v dd , sinking 50 96 noise performance voltage noise density e n f = 1 khz 20 nv/ hz current noise density i n f = 1 khz 0.2 pa/ hz dynamic performance open loop voltage gain a vol r l = 10 k  86 92 db 78 r l = 2 k  83 92 db 78 gain bandwidth product gbwp 7.0 mhz total harmonic distortion + noise thd+n v o = 4vpp, r l = 2 k  , a v = +1, 1 khz 0.005 % v o = 4vpp, r l = 2 k  , a v = +1, 10 khz 0.01 % gain margin a m r l = 10 k  , c l = 5 pf 9 db phase margin  m r l = 10 k  , c l = 5 pf 64 slew rate sr positive slope, r l = 2 k, a v = +1 7 v/  s negative slope, r l = 2 k, a v = +1 14 v/  s power supply power supply rejection ratio psrr 72 80 db 65 quiescent current i cc no load 300 660  a 1 ma
ncs2003, ncv2003 http://onsemi.com 5 typical characteristics figure 1. quiescent supply current vs. supply voltage figure 2. quiescent supply current vs. temperature 02 700 supply voltage (v) supply current (  a) temperature ( c) supply current (  a) ? 50 125 v s = 1.8 v ? 25 0 25 75 100 figure 3. input offset current vs. v cm 012345 20 v cm , common mode voltage (v) input offset current (pa) figure 4. low level output voltage vs. output current @ v s = 1.8 v low level output current (ma) low level output voltage (v) 1.8 0 5 10 15 20 figure 5. low level output voltage vs. output current @ v s = 5 v 0 5 10 15 low level output current (ma) low level output voltage (v) 0.5 0.4 0.3 0.2 0.1 0 figure 6. high level output voltage vs. output current @ v s = 1.8 v high level output current (ma) high level output voltage (v) 1.8 v s = 1.8 v 0 ? 2 ? 4 ? 6 ? 8 ? 10 +25 c +85 c ? 40 c no load 600 500 400 300 200 100 0 345 600 500 400 300 200 100 0 v s = 2.7 v v s = 5 v no load 50 v s = 5 v 18 16 14 12 10 8 6 4 2 0 1.6 1.4 1.2 1 0.8 0.6 0.4 0.2 0 v s = 1.8 v v s = 5 v 20 1.6 1.4 1.2 1 0.8 0.6 0.4 0.2 0 +125 c +25 c +85 c ? 40 c +125 c +85 c +25 c ? 40 c +125 c +85 c +125 c ? 40 c +25 c +125 c +85 c +25 c ? 40 c
ncs2003, ncv2003 http://onsemi.com 6 typical characteristics figure 7. high level output voltage vs. output current @ v s = 5 v figure 8. psrr vs. frequency high level output current (ma) high level output voltage (v) 0 ? 4 ? 8 ? 12 ? 16 ? 20 10 100 1k 100k 1m psrr (db) figure 9. cmrr vs. frequency frequency (hz) cmrr (db) frequency (hz) figure 10. open loop gain and phase vs. frequency @ v s = 1.8 v 100 a vol (db) frequency (hz) figure 11. open loop gain and phase vs. frequency @ v s = 5 v frequency (hz) a vol (db) figure 12. phase margin vs. capacitive load capacitive load (pf) phase margin ( ) 0 80 50 100 150 200 5 140 120 100 v s = 5 v 4.9 4.8 4.7 4.6 4.5 +25 c +85 c ? 40 c +125 c 120 100 80 60 40 20 0 r l = 10 k  t a = 25 c v s = 5 v v s = 1.8 v 100 80 60 40 20 0 r l = 10 k  t a = 25 c v s = 5 v v s = 1.8 v phase ( ) 80 60 40 20 0 ? 20 360 100m 10 100 1k 10k 100k 10m gain ? 2 k  gain ? 10 k  phase ? 10 k  phase ? 2 k  v s = 1.8 v c l = 5 pf t a = 25 c gain phase 80 60 40 20 0 ? 20 gain ? 10 k  gain ? 2 k  phase ? 2 k  phase ? 10 k  gain phase v s = 5 v c l = 5 pf t a = 25 c phase ( ) 360 300 240 180 120 60 0 70 60 50 40 30 20 10 0 v s = 1.8 v r l = 10 k  t a = 25 c 10k 10 100 1k 100k 1m 10k 300 240 180 120 60 0 1m 100m 10 100 1k 10k 100k 10m 1m
ncs2003, ncv2003 http://onsemi.com 7 typical characteristics figure 13. inverting small signal transient response time (  s) voltage (mv) v s = 1.8 v r l = 2 k  t a = 25 c 140 ? 20 0 input output figure 14. non ? inverting small signal transient response time (  s) voltage (mv) v s = 1.8 v r l = 2 k  t a = 25 c input output figure 15. inverting large signal transient response time (  s) voltage (mv) 1800 v s = 1.8 v r l = 2 k  t a = 25 c input output figure 16. non ? inverting large signal transient response time (  s) voltage (mv) v s = 1.8 v r l = 2 k  t a = 25 c input output figure 17. non ? inverting large signal transient response time (  s) voltage (v) 6 v s = 5 v r l = 2 k  t a = 25 c input output figure 18. output overload recovery time (  s) ? 2e ? 5 0e+0 2e ? 54e ? 56e ? 5 voltage (v) 2 1.5 1 0.5 0 ? 0.5 ? 1 ? 1.5 ? 2 v s = 1.8 v r l = 2 k  t a = 25 c input output 120 100 80 60 40 20 0 ? 20 20 40 60 140 120 100 80 60 40 20 0 ? 20 ? 20 0 20 40 60 ? 20 0 20 40 60 1600 1400 1200 1000 800 600 400 200 0 ? 200 1800 1600 1400 1200 1000 800 600 400 200 0 ? 200 ? 20 0 20 40 60 ? 20 0 20 40 60 5 4 3 2 1 0 ? 1
ncs2003, ncv2003 http://onsemi.com 8 typical characteristics figure 19. thd+n vs. frequency figure 20. input voltage noise vs. frequency frequency (hz) frequency (hz) 100k 10k 1k 100 10 10 140 thd+n (%) voltage noise (nv/ hz ) 1 0.1 0.01 0.001 r l = 2 k  a v = +1 t a = 25 c v s = 1.8 v v s = 5 v 100k 10k 1k 100 10 v s = 1.8 v v in = v s /2 120 100 80 60 40 20 0 figure 21. noise density vs. frequency frequency (hz) 10 current noise density (pa/ hz ) 100k 10k 1k 100 10 v s = 1.8 v v in = v s /2 1 0.1 0.01 0.001 0.0001 0.00001 ordering information device marking package shipping ? ncs2003sn2t1g an3 sot23 ? 5 (pb ? free) 3000 / tape and reel ncv2003sn2t1g* (in development) an3 sot23 ? 5 (pb ? free) 3000 / tape and reel NCS2003XV53T2G a3 sot553 ? 5 (pb ? free) 4000 / tape and reel ?for information on tape and reel specifications, including part orientation and tape sizes, please refer to our tape and reel packaging specifications brochure, brd8011/d *ncv prefix for automotive and other applications requiring unique site and control change requirements; aec ? q100 qualified and ppap capable.
ncs2003, ncv2003 http://onsemi.com 9 package dimensions tsop ? 5 case 483 ? 02 issue k notes: 1. dimensioning and tolerancing per asme y14.5m, 1994. 2. controlling dimension: millimeters. 3. maximum lead thickness includes lead finish thickness. minimum lead thickness is the minimum thickness of base material. 4. dimensions a and b do not include mold flash, protrusions, or gate burrs. mold flash, protrusions, or gate burrs shall not exceed 0.15 per side. dimension a. 5. optional construction: an additional trimmed lead is allowed in this location. trimmed lead not to extend more than 0.2 from body. dim min max millimeters a 3.00 bsc b 1.50 bsc c 0.90 1.10 d 0.25 0.50 g 0.95 bsc h 0.01 0.10 j 0.10 0.26 k 0.20 0.60 m 0 10 s 2.50 3.00 123 54 s a g b d h c j  0.7 0.028 1.0 0.039  mm inches  scale 10:1 0.95 0.037 2.4 0.094 1.9 0.074 *for additional information on our pb ? free strategy and soldering details, please download the on semiconductor soldering and mounting techniques reference manual, solderrm/d. soldering footprint* 0.20 5x c ab t 0.10 2x 2x t 0.20 note 5 c seating plane 0.05 k m detail z detail z top view side view a b end view
ncs2003, ncv2003 http://onsemi.com 10 package dimensions sot ? 553, 5 lead case 463b issue c e m 0.08 (0.003) x b 5 pl a c ? x ? ? y ? notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: millimeters 3. maximum lead thickness includes lead finish thickness. minimum lead thickness is the minimum thickness of base material. d e y 12 3 4 5 l 1.35 0.0531 0.5 0.0197  mm inches  scale 20:1 0.5 0.0197 1.0 0.0394 0.45 0.0177 0.3 0.0118 *for additional information on our pb ? free strategy and soldering details, please download the on semiconductor soldering and mounting techniques reference manual, solderrm/d. soldering footprint* h e dim a min nom max min millimeters 0.50 0.55 0.60 0.020 inches b 0.17 0.22 0.27 0.007 c d 1.55 1.60 1.65 0.061 e 1.15 1.20 1.25 0.045 e 0.50 bsc l 0.10 0.20 0.30 0.004 0.022 0.024 0.009 0.011 0.063 0.065 0.047 0.049 0.008 0.012 nom max 1.55 1.60 1.65 0.061 0.063 0.065 h e 0.08 0.13 0.18 0.003 0.005 0.007 0.020 bsc recommended on semiconductor and are registered trademarks of semiconductor co mponents industries, llc (scillc). scillc owns the rights to a numb er of patents, trademarks, copyrights, trade secrets, and other inte llectual property. a listing of scillc?s product/patent coverage may be accessed at ww w.onsemi.com/site/pdf/patent ? marking.pdf. scillc reserves the right to make changes without further notice to any products herein. scillc makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does scillc assume any liability arising out of the application or use of any product or circuit, and s pecifically disclaims any and all liability, including without limitation special, consequential or incidental damages. ?typical? parameters which may be provided in scillc data sheets and/ or specifications can and do vary in different applications and actual performance may vary over time. all operating parameters, including ?typical s? must be validated for each customer application by customer?s technical experts. scillc does not convey any license under its patent rights nor the right s of others. scillc products are not designed, intended, or a uthorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in whic h the failure of the scillc product could create a situation where personal injury or death may occur. should buyer purchase or us e scillc products for any such unintended or unauthorized appli cation, buyer shall indemnify and hold scillc and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unin tended or unauthorized use, even if such claim alleges that scil lc was negligent regarding the design or manufacture of the part. scillc is an equal opportunity/affirmative action employer. this literature is subject to all applicable copyrig ht laws and is not for resale in any manner. publication ordering information n. american technical support : 800 ? 282 ? 9855 toll free usa/canada europe, middle east and africa technical support: phone: 421 33 790 2910 japan customer focus center phone: 81 ? 3 ? 5817 ? 1050 ncs2003/d literature fulfillment : literature distribution center for on semiconductor p.o. box 5163, denver, colorado 80217 usa phone : 303 ? 675 ? 2175 or 800 ? 344 ? 3860 toll free usa/canada fax : 303 ? 675 ? 2176 or 800 ? 344 ? 3867 toll free usa/canada email : orderlit@onsemi.com on semiconductor website : www.onsemi.com order literature : http://www.onsemi.com/orderlit for additional information, please contact your local sales representative


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